(1) Field of the Invention
This invention relates to the use of wafers having metal test patterns to monitor the metal corrosion susceptibility of integrated circuit wafers. More particularly this invention relates to a comparison of numbers of defects per unit area of test pattern wafers, which are processed with product wafers, before and after the test pattern wafers are subjected to a stress environment.
(2) Description of the Related Art
U.S. Pat. No. 5,411,890 to Falat describes using a tapered metal strip on a transparent substrate to monitor corrosion. Corrosion causes the boundary between reflective and non reflective regions to move across the substrate. This test site is quite different than that described in this invention.
U.S. Pat. No. 5,389,216 to Balkanli describes a method of detecting corrosion in underground pipes. The method uses an analysis of the response to injected current pulses to evaluate corrosion.
U.S. Pat. No. 5,481,198 to Patel measures the resistance of a buried neutral wire of underground electrical cables by injecting additional current into the wire and measuring the voltage drop across a known length. This measured resistance is used to determine the amount of corrosion of the underground cable.
U.S. Pat. No. 5,159,752 to Mahant-Shetti et al. uses a grid pattern of electrodes deposited on a semiconductor wafer to monitor corrosion. An electron beam is directed on the structure and a scanning electron microscope is used to observe emitted secondary electrons. The observed secondary electrons gives a picture related to the condition of the pattern, such as shorts, opens, etc. A stress environment is not used to accelerate corrosion.
The invention of this patent application uses a number of test patterns to simulate contact regions, electrode regions, and bulk metal regions. A stress environment is used to accelerate corrosion. The numbers of defects per unit area are measured before and after the test pattern wafers are subjected to the stress environment. A comparison of the numbers of defects per unit area before and after the test pattern wafers are subjected to the stress environment is used to monitor metal corrosion susceptibility of production wafers.